Summary
UCLA researchers in the Department of Electrical Engineering have developed and reduced-to-practice an innovative circuit structure for low power consumption and high gain amplification.
Background
Mobile communications applications are expanding and the need for technologies that provide higher performance and lower power and cost is driving the industry. This current demand is leading researchers to develop better circuit topologies for Radio Frequency/Millimeter Wave Integrated Circuits (RF/MMICs). Circuits capable of higher gain and lower power consumption are required for future RF/MMICs. Current technologies use methods such as impedance matching and cascode/stacked structures. However, current methods do not realize the full potential of RF/MMICs. Impedance matching does not maximize gain and the power benefits conferred are unnecessary for circuits that depend only on voltage gain. The conventional cascode/stacked structures achieve high gain but also require greater supply voltage, which can lead to increased power consumption.
Innovation
UCLA researchers in the Department of Electrical Engineering have developed and reduced-to-practice an innovative circuit structure for low power consumption and high gain amplification. By utilizing an origamic topology, the circuit design exhibits higher gain and enables operation at lower supply voltage with the same signal swing compared to current cascode structures. The innovation involves separating the DC bias path from the AC signal path, which enables the circuit to maintain a wide AC dynamic range.
Applications
The invented circuit topology can be applied to many analog and mixed-signal building blocks such as amplifiers, mixers, or oscillators and frequency dividers. Additionally, they can be used with any circuit where high gain is desired.
Advantages
Circuit design exhibits higher gain than conventional topologies without sacrificing efficiency. Low overall noise when compared to the conventional structures with the same gain. Built in bandpass filtering function with voltage gain prior to the active stage. Lower power consumption due to small transistor sizes needed for the same gain. Higher signal head room and better linearity.
State Of Development
Circuit design has been simulated, fabricated, tested, and applied to low noise amplifiers, mixers, coupled VCO arrays, and frequency dividers.