Summary:
UCLA researchers in the Department of Mechanical and Aerospace Engineering have developed a novel approach to enhance the thermal performance of through-glass vias for advanced semiconductor packaging.
Background:
Advanced semiconductor systems rely on 3D integrated circuits (3DICs) to meet rising demands for higher performance, reduced form factor, and lower latency. Glass interposers are being adopted as substrates for advanced packaging systems due to their low cost and favorable electrical properties, including lower signal loss and scalability. But unlike the current standard of silicon, glass exhibits intrinsically low thermal conductivity, which significantly limits heat dissipation. Consequently, through-glass vias (TGVs) serve as vertical heat conduction paths to prevent device overheating. However, TGVs become critical thermal bottlenecks within glass-based packaging systems due to suboptimal thermal dissipation. With increasing power density and reliability requirements, there is a clear need for a novel approach to enhancing thermal load performance within TGVs.
Innovation:
To address these limitations, researchers at UCLA have developed a thermally enhanced TGV. The technology displays greatly improved heat dissipation within glass interposer substrates. The enhanced TGV preserves the benefits of glass interposers, which include low RF loss, dimensional stability, and cost efficiency. Additionally, the technology can be directly integrated into 3DIC packaging and is compatible with current copper electroplating workflows, enabling seamless adoption into standard manufacturing methods. This novel approach mitigates the thermal bottleneck inherent to TGVs, thereby facilitating accelerated adoption of glass interposers in advanced semiconductor manufacturing.
Potential Applications:
● 3DIC packaging
○ High-performance computing
○ Artificial intelligence
● RF and high-frequency packaging
● High-power semiconductor devices
○ Voltage regulators
○ Mixed-signal devices
● Advanced memory and storage technologies
● Photonics and optoelectronics
Advantages:
● Enhanced thermal performance
● Enhanced thermal reliability
● Scalable
○ Compatible with current copper electroplating workflows
○ Easily integratable in 3DIC packaging
● Glass Interposer
○ Low RF loss
○ Dimensional stability
○ Low cost
Development-To-Date:
First description of the complete invention, simulations proving the concept.
Related Papers:
● Y. Yang, J. Chien, S. Lyu and T. Wei, "Development of Straight, Small-Diameter, High-Aspect Ratio Copper-Filled Through-Glass Vias (TGV) for High-Density 3D Interconnections," 2025 IEEE 75th Electronic Components and Technology Conference (ECTC), Dallas, TX, USA, 2025, pp. 1036-1042, doi: 10.1109/ECTC51687.2025.00181.
Reference:
UCLA Case No. 2026-156
Lead Inventor:
Tiwei Wei, Assistant Professor, Department of Mechanical and Aerospace Engineering