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2022-023 COPYRIGHT: FIELD-PROGRAMMABLE GATE ARRAY (FPGA) CORE FOR PROTOGRAPH-BASED RAPTOR-LIKE (PBRL) LOW-DENSITY PARITY-CHECK (LDPC) ENCODING AND DECODING

SUMMARY: UCLA researchers in the Department of Electrical and Computer Engineering have developed a software that serves as field programmable gate arrays (FPGAs) encoder and decoder for optical communications. BACKGROUND: Satellite communications requires wireless communication techniques that are resilient, secure, and able to process high volumes...

Published: 11/15/2024 | Inventor(s): Richard Wesel, Linfang Wang, Dariush Divsalar, Caleb Terill, Chester Hulse, Sean Chen, Calvin Kuo

Keywords(s): Aerospace Engineering, Communications Satellite, Field-Programmable Gate Array, Low-Density Parity-Check Code, Telecommunication, Wireless

Category(s): Software & Algorithms, Software & Algorithms > Communication & Networking, Electrical, Electrical > Wireless, Software & Algorithms > Programs