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Efficient Stochastic Compute-In-Memory Circuit for Multi-Level or Accumulation (Case No. 2024-122)

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel computational hardware that combines stochastic computing with compute-in-memory techniques that improves speed and computational efficiency. Background: In recent years, the need for advanced computational technologies has surged, driven by...

Published: 7/8/2024 | Inventor(s): Sudhakar Pamarti, Jiyue Yang, Soumitra Pal, Puneet Gupta, Tianmu Li, Wojciech Romaszkan

Keywords(s): computational efficiency, Computer Architecture, Integrated Circuit, Logic Gate, neural network, Stochastic Computing (SC)

Category(s): Electrical > Computing Hardware, Electrical > Electronics & Semiconductors > Circuits