UCLA Researchers & Innovators
Industry & Investors
News & Events
About
Concierge
Search Results - sudhakar+pamarti
6
Results
Sort By:
Published Date
Updated Date
Title
ID
Descending
Ascending
Multilevel Buffered Link (Case No. 2025-284)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel on-chip link that enhances communication performance and energy efficiency in modern integrated circuits. Background: On-chip communication enables data transfer between microchip components and is critical in computing, automotive, and industrial...
Published: 8/20/2025
|
Inventor(s):
Sudhakar Pamarti
,
Chih-Kong Yang
,
Haris Suhail
Keywords(s):
Bandwidth (Signal Processing)
,
buffer layer
,
Clock Signal
,
efficiency bandwidth products
,
Electrical
,
Electrical Engineering
,
Energy Efficiency
,
energy efficient IoT
,
energy-efficient
,
high-data-rate links
,
high-speed communications
,
IoT communication
,
large bandwidth
,
low-power device
,
Network On A Chip
,
scalable communication
,
scalable fabrication
,
Signaling pathways
,
Signal-To-Noise Ratio
,
System On A Chip
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors > Circuits
,
Electrical > Computing Hardware
,
Software & Algorithms > Communication & Networking
,
Electrical > Signal Processing
In-Situ Stochastic Computing in Memory (Case No. 2024-121)
Summary: Researchers in the UCLA Department of Electrical and Computer Engineering have developed a data-converter-free in-memory computing circuit that greatly reduces data processing latencies. Background: Low latency and low power computing circuitry is in high demand for artificial intelligence (AI) / machine learning (ML) applications. Compute...
Published: 2/20/2025
|
Inventor(s):
Sudhakar Pamarti
,
Jiyue Yang
Keywords(s):
Category(s):
Electrical
,
Electrical > Computing Hardware
,
Electrical > Electronics & Semiconductors
,
Software & Algorithms > Artificial Intelligence & Machine Learning
Efficient Stochastic Compute-In-Memory Circuit for Multi-Level OR Accumulation (Case No. 2024-122)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel computational hardware that combines stochastic computing with compute-in-memory techniques that improves speed and computational efficiency. Background: In recent years, the need for advanced computational technologies has surged, driven by...
Published: 2/14/2025
|
Inventor(s):
Sudhakar Pamarti
,
Jiyue Yang
,
Soumitra Pal
,
Puneet Gupta
,
Tianmu Li
,
Wojciech Romaszkan
Keywords(s):
computational efficiency
,
Computer Architecture
,
Integrated Circuit
,
Logic Gate
,
neural network
,
Stochastic Computing (SC)
Category(s):
Electrical > Computing Hardware
,
Electrical > Electronics & Semiconductors > Circuits
2021-106 Fast Startup of Crystal and Other High-Q Oscillators
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel device to rapidly startup High-Q Oscillators which reduce power consumption of wearable electronic devices. Background Wearable digital devices and small wirelessly connected devices known as “Internet of Things” are used in a wide...
Published: 7/17/2025
|
Inventor(s):
Sudhakar Pamarti
Keywords(s):
Energy Efficiency
,
Energy Generation & Storage
,
Nanocrystal
,
Power Electronics
,
Semiconductor Device
,
Voltage-Controlled Oscillator
,
Wireless
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Energy & Environment > Energy Storage > Batteries
2012-107 A Digital Polar and a ZVS Contour Based Hybrid Power Amplifier
A Digital Polar and a ZVS Contour Based Hybrid Power AmplifierSUMMARYResearchers in the UCLA Department of Electrical Engineering have created a hybrid digital polar and zero switching voltage (ZVS) contour power amplifier, offering higher efficiency for up to 36 dB peak-to-average ratio.BACKGROUNDTraditional power amplifiers are biased in order to...
Published: 7/17/2025
|
Inventor(s):
Sudhakar Pamarti
,
Nitesh Singhal
Keywords(s):
Electronics & Semiconductors
Category(s):
Electrical > Electronics & Semiconductors
Ultra-Low-Power Reference Clock Generation
SummaryUCLA researchers in the Department of Electrical and Computer Engineering have developed a novel ultra-low power crystal oscillator architecture that achieves the lowest reported power consumption.BackgroundCrystal oscillators (XOs) are high-Q resonators that are widely used in electronics systems to generate the reference clock signal. Ultra-low...
Published: 7/17/2025
|
Inventor(s):
Hani Esmaeelzadeh
,
Sudhakar Pamarti
Keywords(s):
Electronics & Semiconductors
Category(s):
Electrical > Electronics & Semiconductors
,
Materials > Fabrication Technologies