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Multilevel Buffered Link (Case No. 2025-284)
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel on-chip link that enhances communication performance and energy efficiency in modern integrated circuits. Background: On-chip communication enables data transfer between microchip components and is critical in computing, automotive, and industrial...
Published: 8/20/2025
|
Inventor(s):
Sudhakar Pamarti
,
Chih-Kong Yang
,
Haris Suhail
Keywords(s):
Bandwidth (Signal Processing)
,
buffer layer
,
Clock Signal
,
efficiency bandwidth products
,
Electrical
,
Electrical Engineering
,
Energy Efficiency
,
energy efficient IoT
,
energy-efficient
,
high-data-rate links
,
high-speed communications
,
IoT communication
,
large bandwidth
,
low-power device
,
Network On A Chip
,
scalable communication
,
scalable fabrication
,
Signaling pathways
,
Signal-To-Noise Ratio
,
System On A Chip
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors > Circuits
,
Electrical > Computing Hardware
,
Software & Algorithms > Communication & Networking
,
Electrical > Signal Processing