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Charge Trap Transistors - Subramanian Iyer

Background: Due to their chemical makeup and heat generation, devices such as high-k/metal gate (HKMG) CMOS often accumulate charges can lead to variation in integrated circuits. Charge Trap Transistors (CTT's) utilize accumulating charge in semiconducting devices as embedded non-volatile memory (eNVM). The introduction of CTT's can prove an...

Published: 7/19/2023 | Inventor(s): Subramanian Iyer

Keywords(s): Charge Carrier, CMOS, Dynamic Random-Access Memory, Electrical, Electrical Engineering, Electrical Load, Electrical Resistance And Conductance, Logic Gate, Magnetoresistive Random-Access Memory, Medical Device, Memory, Power Electronics, Power Transmission, Programmable Logic Device, Random-Access Memory, Resistive Random-Access Memory, Semiconductor Device, Semiconductor Device Fabrication, Static Random-Access Memory, Transistor

Category(s): Electrical, Electrical > Electronics & Semiconductors > Memory, Electrical > Electronics & Semiconductors

2021-400 COMET: On-Die and In-Controller Collaborative Memory ECC Technique for Stronger and Safer Correction of DRAM Errors

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a method titled Collaborative Memory ECC Technique (COMET), to efficiently detect two error correcting codes (ECC) and eliminate silent data corruption (SDC) when double-bit errors occur within DRAMs. Background: Technological abundance has been the...

Published: 12/11/2023 | Inventor(s): Puneet Gupta, Irina Alam

Keywords(s): Analogue Electronics, Big Data, Data Corruption, DDR3 SDRAM, DDR4 SDRAM, Random-Access Memory, Semiconductor, Semiconductor Device, Soft Error, Software

Category(s): Electrical, Electrical > Electronics & Semiconductors, Materials > Semiconducting Materials, Energy & Environment > Energy Storage

2021-212 Configurable Memory Pool System

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a node processing architecture that allows memory pool to be scalable and allows the integration of heterogeneous technologies downstream. Background: Modern electronic applications require high memory capacity and bandwidth. However, many of these applications...

Published: 12/22/2023 | Inventor(s): Puneet Gupta, Saptadeep Pal, Matthew Tomei, Rakesh Kumar

Keywords(s): Bandwidth (Computing), Dynamic Random-Access Memory, Electrical Engineering, Flash Memory, Latency (Engineering), Magnetoresistive Random-Access Memory, Random-Access Memory, Static Random-Access Memory

Category(s): Electrical, Electrical > Electronics & Semiconductors > Circuits, Electrical > Electronics & Semiconductors