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2022-241 A TSV-Less Architecture for Power Delivery and I/O for Interposers and Other Advanced Packaging Constructs
Summary: UCLA researchers led by Professor Iyer have developed a wafer-scale processor manufacturing method that does not require standard through-silicon vias (TSVs). Background: With the rise of machine learning applications, demand for devices capable of high-performance computing (HPC) has also increased. Popularity and demand for wafer-scale...
Published: 7/19/2023
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Inventor(s):
Subramanian Iyer
,
Haoxiang Ren
,
Saptadeep Pal
Keywords(s):
Amorphous Silicon
,
Artifical Intelligence (Machine Learning, Data Mining)
,
Artificial Intelligence
,
Artificial Neural Network
,
Bandwidth (Signal Processing)
,
Brain-Computer Interface
,
Brain-Computer Interface Body Mass Index
,
Chipset
,
Clock Signal
,
Computer Aided Design & Manufacturing
,
Computer Aided Learning
,
Computer Architecture
,
Computer Monitor
,
Computer Security
,
Computer Virus
,
Computer Vision
,
Computer-Aided Design
,
Computer-Aided Diagnosis
,
Continuum Mechanics Computer Graphics Collision Detection
,
Digital Signal Processing
,
Doping (Semiconductor)
,
Electrical
,
Electrical Engineering
,
Electrical Impedance
,
Electrical Load
,
Electrical Resistance And Conductance
,
Electrical Resistivity And Conductivity
,
Electronics & Semiconductors
,
Graphics Processing Unit
,
Graphics Processing Unit Analog Computer
,
Human-Computer Interaction
,
Machine Learning
,
Machine Vision
,
Manufacturing
,
Microelectronics Semiconductor Device Fabrication
,
Microprocessor
,
Network Analysis (Electrical Circuits)
,
Network On A Chip
,
Organic Semiconductor
,
Quantum Computer
,
Semiconductor
,
Semiconductor Device
,
Semiconductor Device Fabrication
,
Semiconductor Ohmic Contact
,
Semiconductor Risk Assessment
,
Semiconductor Sapphire
,
Semiconductors
,
Signal Processing
,
Silicon
,
Silicon Dioxide
,
Silicon Working Electrode Perovskite (Structure)
,
Silicon-Germanium
,
Supercomputer
,
System On A Chip
,
Tablet Computer
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Electrical > Signal Processing
,
Materials > Semiconducting Materials
,
Electrical > Electronics & Semiconductors > Circuits
,
Software & Algorithms > Artificial Intelligence & Machine Learning
2022-051 Reliable and Fault-Tolerant Clock Generation and Distribution for Chiplet-Based Waferscale Processors
Summary: UCLA researchers in the department of Electrical and Computer Engineering have developed an on-chip clock propagation circuit that allows creation of large-scale fault-robust processor systems which are essential for the next generation of big data solutions. Background: Waferscale processor systems can provide the large number of cores,...
Published: 12/12/2023
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Inventor(s):
Puneet Gupta
,
Saptadeep Pal
Keywords(s):
Chipset
,
Clock Signal
,
Computer Architecture
,
Electrical Breakdown
,
Electronics & Semiconductors
,
Integrated Circuit
,
Microprocessor
,
Network On A Chip
,
Semiconductor
,
Semiconductor Device
,
Semiconductors
,
Supercomputer
,
System On A Chip
Category(s):
Electrical > Electronics & Semiconductors
,
Materials > Semiconducting Materials
,
Electrical
,
Electrical > Electronics & Semiconductors > Circuits
2021-212 Configurable Memory Pool System
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a node processing architecture that allows memory pool to be scalable and allows the integration of heterogeneous technologies downstream. Background: Modern electronic applications require high memory capacity and bandwidth. However, many of these applications...
Published: 12/22/2023
|
Inventor(s):
Puneet Gupta
,
Saptadeep Pal
,
Matthew Tomei
,
Rakesh Kumar
Keywords(s):
Bandwidth (Computing)
,
Dynamic Random-Access Memory
,
Electrical Engineering
,
Flash Memory
,
Latency (Engineering)
,
Magnetoresistive Random-Access Memory
,
Random-Access Memory
,
Static Random-Access Memory
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors > Circuits
,
Electrical > Electronics & Semiconductors