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2021-229 Processes, Equipment and Materials Recipes, and Related Know-How to Perform the Silicon-Interconnect Fabric (Si-IF) Chip-Scale Packaging Technology

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel manufacturing process for Silicone-Interconnect Fabric (Si-IF) that is not only scalable, but also robust as it relies on established processing techniques from CMOS technologies. Background: With the rise of computation-heavy applications, such...

Published: 7/19/2023 | Inventor(s): Subramanian Iyer

Keywords(s): Analogue Electronics, CMOS, Consumer Electronics, Digital Electronics, Electronic Packaging, Electronics & Semiconductors, electronics packaging, heterogenous electronic systems, Integrated Circuit Via (Electronics), Interposers, Nanotechnology, Power Electronics, Printed Circuit Board, Printed Electronics, Silicon

Category(s): Electrical, Electrical > Electronics & Semiconductors, Materials, Materials > Nanotechnology, Electrical > Electronics & Semiconductors > Memory

2021-400 COMET: On-Die and In-Controller Collaborative Memory ECC Technique for Stronger and Safer Correction of DRAM Errors

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a method titled Collaborative Memory ECC Technique (COMET), to efficiently detect two error correcting codes (ECC) and eliminate silent data corruption (SDC) when double-bit errors occur within DRAMs. Background: Technological abundance has been the...

Published: 12/11/2023 | Inventor(s): Puneet Gupta, Irina Alam

Keywords(s): Analogue Electronics, Big Data, Data Corruption, DDR3 SDRAM, DDR4 SDRAM, Random-Access Memory, Semiconductor, Semiconductor Device, Soft Error, Software

Category(s): Electrical, Electrical > Electronics & Semiconductors, Materials > Semiconducting Materials, Energy & Environment > Energy Storage