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A High Throughput Thermal Compression Bonding Scheme for Interposer and Wafer-Scale Advanced Packaging Constructs (Case No. 2023-144)

Summary: UCLA researchers in the Department of Electrical and Computer and Engineering have introduced a scalable and rapid bonding method for dielet assembly on advanced packaging constructs, achieving a remarkable throughput of over 1100 units-per-hour, or 10-fold higher than the conventional assembly method. Background: In semiconductor packaging,...

Published: 7/9/2024 | Inventor(s): Subramanian Iyer, Krutikesh Sahoo, Haoxiang Ren

Keywords(s): advanced packaging, advanced packaging constructs, dielet assembly, dielet bonding, Electronic Packaging, electronics packaging, Fabrication Technologies, face-to-face heterogeneous dielet bonding, heterogeneous integration, heterogenous electronic systems, high throughput, Instrumentation, Interposers, Microelectronics Semiconductor Device Fabrication, Organic Semiconductor, package scaling, Semiconductor, semiconductor chip foundries, Semiconductor Device, Semiconductor Device Fabrication, Semiconductors, thermal compression bonding, wafer-scale, wafer-scale computing, Waferscale Processors

Category(s): Electrical, Electrical > Electronics & Semiconductors, Electrical > Electronics & Semiconductors > Waferscale Computing, Materials, Materials > Semiconducting Materials, Materials > Fabrication Technologies, Electrical > Instrumentation