Search Results - wafer-scale

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Transformer-Based High-Density, Efficient Power Delivery Architecture for Wafer-Scale Integrated Systems (Case No. 2026-075)

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a transformer-based, high-density power delivery architecture that enables efficient, scalable, and low-loss energy distribution for next-generation wafer-scale and chiplet-based systems. Background: Chiplet-based and wafer-scale integrated systems demand...

Published: 5/15/2026 | Inventor(s): Subramanian Iyer, Goutham Ezhilarasu, Namkang Lee

Keywords(s): analog computing, Artificial Intelligence, Electrical, energy-efficient, high power electronics, high-performance computing, large-area arrays, power conversion efficiency, Power distribution & grids, Power Electronics, Power Transmission, scalable fabrication, Transformer, wafer-scale, wafer-scale computing, Waferscale Processors

Category(s): Electrical, Electrical > Electronics & Semiconductors, Electrical > Electronics & Semiconductors > Waferscale Computing, Energy & Environment > Energy Efficiency, Energy & Environment

Non-Destructive Probes for Known Good Die and Assembly Testing (Case No. 2026-073)

Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a liquid-metal-based, nondestructive probing platform for high-density semiconductor die and assembly testing. Background: As semiconductor devices become smaller and more complex, manufacturers face growing challenges in testing chips before they are...

Published: 3/2/2026 | Inventor(s): Subramanian Iyer, Samuel Wang

Keywords(s): biocompatible, Chipset, dielet assembly, Electrical, Electrical Engineering, Electronic Packaging, electronics packaging, high throughput testing, Liquid metal particles, liquid metals, low-cost fabrication, MEMS, micro-electromechanical systems (MEMS), Microelectronics Semiconductor Device Fabrication, scalable fabrication, Semiconductor, Semiconductor Device Fabrication, Semiconductors, soft electrical circuits, wafer-scale

Category(s): Electrical, Electrical > Electronics & Semiconductors, Materials, Materials > Fabrication Technologies, Materials > Semiconducting Materials, Mechanical > Manufacturing, Mechanical > Micro-Electromechanical Systems (Mems)

A High Throughput Thermal Compression Bonding Scheme for Interposer and Wafer-Scale Advanced Packaging Constructs (Case No. 2023-144)

Summary: UCLA researchers in the Department of Electrical and Computer and Engineering have introduced a scalable and rapid bonding method for dielet assembly on advanced packaging constructs, achieving a remarkable throughput of over 1100 units-per-hour, or 10-fold higher than the conventional assembly method. Background: In semiconductor packaging,...

Published: 10/20/2025 | Inventor(s): Subramanian Iyer, Krutikesh Sahoo, Haoxiang Ren

Keywords(s): advanced packaging, advanced packaging constructs, dielet assembly, dielet bonding, Electronic Packaging, electronics packaging, Fabrication Technologies, face-to-face heterogeneous dielet bonding, heterogeneous integration, heterogenous electronic systems, high throughput, Instrumentation, Interposers, Microelectronics Semiconductor Device Fabrication, Organic Semiconductor, package scaling, Semiconductor, semiconductor chip foundries, Semiconductor Device, Semiconductor Device Fabrication, Semiconductors, thermal compression bonding, wafer-scale, wafer-scale computing, Waferscale Processors

Category(s): Electrical, Electrical > Electronics & Semiconductors, Electrical > Electronics & Semiconductors > Waferscale Computing, Materials, Materials > Semiconducting Materials, Materials > Fabrication Technologies, Electrical > Instrumentation