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2012-038 Improved Programmable Logic Circuit Architecture Using Resistive Memory Elements
Summary: UCLA researchers have designed a novel FPGA architecture using resistive memory elements, which saves area and increases speed without changing architectural functions by allowing the interconnects to be entirely fabricated over the logic blocks. Background: A field-programmable gate array (FPGA) is known as an attractive alternative to...
Published: 11/15/2024
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Inventor(s):
Jingsheng Cong
,
Bingjun Xiao
Keywords(s):
Category(s):
Electrical > Electronics & Semiconductors
,
Electrical > Electronics & Semiconductors > Memory
2010-241 Single-Mask Double-Patterning Lithography
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a shift-trim double-patterning lithography (ST-DPL) technique to improve the manufacturing of microprocessors and allow for densely-featured patterns. Background: Photolithography is a common method used for the production of various electrical materials...
Published: 10/7/2024
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Inventor(s):
Puneet Gupta
,
Rani Ghaida
Keywords(s):
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Materials
,
Materials > Semiconducting Materials
,
Electrical > Electronics & Semiconductors > Memory
2021-229 Processes, Equipment and Materials Recipes, and Related Know-How to Perform the Silicon-Interconnect Fabric (Si-IF) Chip-Scale Packaging Technology
Summary: UCLA researchers in the Department of Electrical and Computer Engineering have developed a novel manufacturing process for Silicone-Interconnect Fabric (Si-IF) that is not only scalable, but also robust as it relies on established processing techniques from CMOS technologies. Background: With the rise of computation-heavy applications, such...
Published: 7/19/2023
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Inventor(s):
Subramanian Iyer
Keywords(s):
Analogue Electronics
,
CMOS
,
Consumer Electronics
,
Digital Electronics
,
Electronic Packaging
,
Electronics & Semiconductors
,
electronics packaging
,
heterogenous electronic systems
,
Integrated Circuit Via (Electronics)
,
Interposers
,
Nanotechnology
,
Power Electronics
,
Printed Circuit Board
,
Printed Electronics
,
Silicon
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Materials
,
Materials > Nanotechnology
,
Electrical > Electronics & Semiconductors > Memory
Charge Trap Transistors - Subramanian Iyer
Background: Due to their chemical makeup and heat generation, devices such as high-k/metal gate (HKMG) CMOS often accumulate charges can lead to variation in integrated circuits. Charge Trap Transistors (CTT's) utilize accumulating charge in semiconducting devices as embedded non-volatile memory (eNVM). The introduction of CTT's can prove an...
Published: 7/19/2023
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Inventor(s):
Subramanian Iyer
Keywords(s):
Charge Carrier
,
CMOS
,
Dynamic Random-Access Memory
,
Electrical
,
Electrical Engineering
,
Electrical Load
,
Electrical Resistance And Conductance
,
Logic Gate
,
Magnetoresistive Random-Access Memory
,
Medical Device
,
Memory
,
Power Electronics
,
Power Transmission
,
Programmable Logic Device
,
Random-Access Memory
,
Resistive Random-Access Memory
,
Semiconductor Device
,
Semiconductor Device Fabrication
,
Static Random-Access Memory
,
Transistor
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors > Memory
,
Electrical > Electronics & Semiconductors
Waferscale Computing, Emerging Memory Systems, and Lightweight Machine Learning Systems - Puneet Gupta
2022-051 Reliable and Fault-Tolerant Clock Generation and Distribution for Chiplet-Based Waferscale Processors Researchers at UCLA have developed an on-chip fast clock which can be integrated into each chiplet. By doing this, the fast clock can be propagated from one chiplet to another. This provides consistent clock signaling to large systems as well...
Published: 7/19/2023
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Inventor(s):
Puneet Gupta
Keywords(s):
Artificial Intelligence
,
Chipset
,
DDR4 SDRAM
,
Electrical Engineering
,
Electronics & Semiconductors
,
Semiconductor
,
Semiconductor Device
,
Semiconductors
,
Software
,
Software & Algorithms
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Electrical > Signal Processing
,
Materials > Semiconducting Materials
,
Software & Algorithms > Artificial Intelligence & Machine Learning
,
Electrical > Electronics & Semiconductors > Memory
2021-125 Analog Nonvolatile Memory-Based In-Memory Computing Multiply-And-Accumulate (MAC) Engine
Summary: UCLA researchers in the Department of the Electrical and Computer Engineering have developed a method to use Charge-Trap Transistors (CTTs) for analog nonvolatile memory-based in memory computing multiply-and accumulate (MAC) engine for high performance computations in AI platforms. Background: Advances in Machine Learning and Artificial...
Published: 10/26/2023
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Inventor(s):
Subramanian Iyer
Keywords(s):
Category(s):
Electrical
,
Electrical > Electronics & Semiconductors
,
Electrical > Electronics & Semiconductors > Memory
2021-167 Non-Volatile SRAM Using Charge Trap Transistors
SUMMARYUCLA researchers in the Department of Electrical and Computer Engineering have developed a fast embedded memory using a standard CMOS logic process that can retain data when the powered down for any reason.BACKGROUNDIn traditional static random-access memory (SRAM), data can be lost when the power supply falls below a certain voltage level. To...
Published: 7/19/2023
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Inventor(s):
Subramanian Iyer
Keywords(s):
Category(s):
Electrical > Electronics & Semiconductors > Memory
2010-381 Vertical-Stacked-Array-Transistor (VSAT) for Nonvolatile Memory Devices
SummaryUCLA researchers in the Department of Electrical Engineering have created a novel Vertical-Stacked-Array-Transistor (VSAT) for ultra-high-density and cost-effective NAND flash memory devices and solid state drives. Background The NAND flash memory has a simple cell structure allowing for higher density and more memory capacity. Further, it is...
Published: 7/19/2023
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Inventor(s):
Keywords(s):
Category(s):
Electrical > Electronics & Semiconductors > Memory
2010-140 In-Place Reconfiguration for Programmable Logic
2010-140 In-Place Reconfiguration for Programmable Logic Summary Researchers at UCLA have developed a fault-tolerant logic resynthesis algorithm for LUT-based FPGAs which decreases the circuit fault rate without changing the topology of the logic network, thus eliminating the additional rounds of physical design that are required in conventional resynthesis...
Published: 7/19/2023
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Inventor(s):
Keywords(s):
Category(s):
Electrical > Electronics & Semiconductors > Memory
,
Electrical > Electronics & Semiconductors
2009-453 Vsat Structure for Nonvolatile Memory Device
Summary Provided are a semiconductor device and a method of fabricating the same. At least one mold structure defining at least one first opening is formed on a substrate, wherein the mold structure comprises first mold patterns and second mold patterns that are sequentially and alternatingly stacked. Thereafter, side surfaces of the first mold patterns...
Published: 7/19/2023
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Inventor(s):
Keywords(s):
Category(s):
Electrical > Electronics & Semiconductors > Memory
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